The synchronous rectification circuits are employed to improve the efficiency of the power supply apparatus, especially in applications having low voltage and large output current. Thus, the applications of the synchronous rectification circuits are more and more intensive, and the improvements aimed at overcoming their drawbacks are taken more seriously nowadays. For example, FIG. 1 shows a schematic circuit diagram of a flyback converter having a synchronous rectifier and free from a parasitic inductor in the prior art, in which the flyback converter receives an input voltage Vin and comprises an input capacitor Ci, a conversion circuit stage, a transformer Tr, a synchronous rectification circuit, an output circuit stage and a load RL. The conversion circuit stage comprises a resistor Rs, a capacitor Cs and a transistor Q0. The synchronous rectification circuit comprises a synchronous rectifier Q1 having a first terminal D, a second terminal S and a control terminal G (e.g., a MOSFET, in which D is its drain, S is its source, and G is its gate), resistors Rdc, Rg and RMOT, a capacitor Cdc and a controller UI (e.g., an IC: IR1166S). The output circuit stage comprises an output capacitor Co.
Usually, a voltage across terminals D and S, VDS, is known to be equal to iDS*Rdson, which means VDS is linearly proportional to iDS, in which Rdson is the resistance when Q1 is turned on. That is to say:VDS=Rdson*(iDS)  (1)
FIG. 2 shows the corresponding waveforms of the synchronous rectifier Q1 in FIG. 1. VTH1 is a threshold voltage, and VG is the gate voltage. Q1 is turned off when VDS=VTH1.
However, in fact, when a circuit has a synchronous rectifier comprising a drain and a source, each of which is coupled to an inductor in series, for example, a flyback converter has a synchronous rectifier comprising a drain and a source, each of which comprises a parasitic inductor (as shown in FIG. 3, the remaining elements are the same as those of FIG. 1 except for the first and the second parasitic inductors L1 and L2), a measured value of VDS obtained via sampling is:VDS=iDS*Rdson+(L1+L2)*d(iDS)/dt  (2)
FIG. 4 shows a waveform diagram of the corresponding waveforms of the synchronous rectifier Q1 in FIG. 3, in which VDS1 is the sampled voltage across DS of Q1 under the circumstances of considering the parasitic inductors, VG1 is the driving voltage of Q1 under the circumstances of considering the parasitic inductors, VDS2 is the sampled voltage across DS of Q2 under the circumstances of not considering the parasitic inductors and VG2 is the driving voltage of Q2 under the circumstances of not considering the parasitic inductors. There are significant differences between the two states of considering and not considering the parasitic inductors respectively.
It is possible that there are external inductors connected to the drain and the source of the synchronous rectifier in series in the realistic applications, that is to say, L1 and L2 are the first external inductor and the second external inductor at the moment, and if the voltage across terminals D and S is sampled, the influence of the first external inductor and the second external inductor towards the voltage VDS are the same as the influence of the first parasitic inductor and the second parasitic inductor towards the voltage VDS as shown in FIG. 3. Besides, the external inductor L1 or L2 could be zero.
FIG. 5 shows a circuit diagram of a resonant converter having a synchronous rectifier in the prior art, in which the resonant converter receives an input voltage Vi, and comprises switching switches Q1 and Q2, a conversion circuit stage, a transformer Tr, a synchronous rectification circuit, an output circuit stage and a load RL. The conversion circuit stage comprises a capacitor Cs, a resonant inductor Ls (its resonant voltage is Vr, and its resonant current is ir), and a magnetic inductor Lm having a magnetic current of im. The synchronous rectification circuit comprises two synchronous rectifiers S1 (including a body diode D1 and a capacitor C1, the current flowing through S1 is is1) and S2 (including a body diode D2 and a capacitor C2, the current flowing through S2 is is2). The output circuit stage comprises an output capacitor Co having a function of output filtering. Surely, the output circuit stage could further comprise a stage or even multiple stages of filter circuit comprising inductors and capacitors and connected between the output capacitor Co and the load in the realistic applications. FIG. 6 shows a waveform diagram of the relative waveforms of the resonant converter in FIG. 5, in which Vgp is the gate voltage of the primary side switches (Q1 and Q2), Vgs is the gate voltage of the secondary side switches (synchronous rectifiers S1 and S2). As shown in FIG. 6, the current flowing through the secondary side switches (synchronous rectifiers S1 and S2) of the transformer Tr is similar to a sinusoidal wave in a resonant converter. Thus, (L1+L2)*d(iDS)/dt is varied according to different load conditions.
Keeping the drawbacks of the prior arts in mind, and employing experiments and research full-heartily and persistently, the applicants finally conceived a compensation device for synchronous rectifier control and method thereof.